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| Control IC for Single-Ended and Push-Pull Switched-Mode Power Supplies (SMPS) TDA 4700 TDA 4718 Features q q q q q q q q Feed-forward control (line hum suppression) Symmetry inputs for push-pull converter (TDA 4700) Push-pull outputs Dynamic output current limitation Overvoltage protection Undervoltage protection Soft start Double pulse suppression P-DIP-24-1 Type TDA 4700 A s TDA 4718 A Ordering Code Q67000-Y594 Q67000-Y639 Package P-DIP-24-1 P-DIP-18-1 Temp.-Range - 0 to 70 C - 0 to 70 C P-DIP-18-1 s Not for new design These versatile SMPS control ICs comprise digital and analog functions which are required to design highquality flyback, single-ended and push-pull converters in normal, half-bridge and full-bridge configurations. The component can also be used in single-ended voltage multipliers and speed-controlled motors. Malfunctions in electrical operation are recognized by the integrated operational amplifiers, which activate protective functions. 1) Is now available for temperature range - 25 to 85 C. Semiconductor Group 1 05.95 TDA 4700 TDA 4718 Pin Configuration (TDA 4700) (top view) Semiconductor Group 2 TDA 4700 TDA 4718 Pin Definitions and Functions (TDA 4700) Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Symbol GND + VREF + VS Q2 Q1 I SYM Q2 Q SYNC Function Ground 0 V Reference voltage Supply voltage Output Q2 Output Q1 Symmetry Q2 Sync. output Soft start VCO RT Capacitance VCO CT Ramp generator RR Ramp generator CR Comparator input Operational amplifier output Operational amplifier input (-) Operational amplifier input (+) Sync. input ON/OFF, undervoltage Overvoltage output Overvoltage input Dynamic current limitation (-) Dynamic current limitation (+) Symmetry Csoft start RT Cfilter CT RR CR I COMP Q Op Amp - I Op Amp + I Op Amp I SYNC ON/OFF/IUV QOV IOV - IDYN + IDYN I SYM Q1 Semiconductor Group 3 TDA 4700 TDA 4718 Pin Configuration (TDA 4718) (top view) Semiconductor Group 4 TDA 4700 TDA 4718 Pin Definitions and Functions (TDA 4718) Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Symbol GND Function Ground 0 V Ramp generator RR Ramp generator CR + Input comparator K2 Sync. input Input undervoltage, ON/OFF Input overvoltage Input dynamic current limitation (-) Input dynamic current limitation (+) Reference voltage Supply voltage Output Q2 Output Q1 Sync. output Soft start VCO RT Capacitance VCO CT RR CR I COMP I SYNC IUV IOV - IDYN + IDYN + VREF + VS Q2 Q1 Q SYNC Csoft start RT Cfilter CT Circuit Description Voltage Controlled Oscillator (VCO) The VCO generates a sawtooth voltage. The duration of the falling edge is determined by the value of CT. The duration of the rising edge of the waveform and, therefore, approximately the frequency, is determined by the value of RT. By varying the voltage at Cfilter, the oscillator frequency can be changed by its rated value. During the fall time, the VCO provides a trigger signal for the ramp generator, as well as an L signal for a number of IC parts to be controlled. Semiconductor Group 5 TDA 4700 TDA 4718 Ramp Generator The ramp generator is triggered by the VCO and oscillates at the same frequency. The duration of the falling edge of the ramp generator waveform is to be shorter than the fall time of the VCO. To control the pulse width at the output, the voltage of the rising edge of the ramp generator signal is compared with a DC voltage at comparator K2. The slope of the rising edge of the ramp generator signal is controlled by the current through RR. This offers the possibility of an additional, superimposed control of the output duty cycle. This additional control capability, called "feed-forward control", is utilized to compensate for known interference such as ripple on the input voltage. Phase Comparator If the component is operated without external synchronization, the sync input must be connected to the sync output for the phase comparator to set the rated voltage at Cfilter. The VCO then oscillates with rated frequency. In the case of external synchronization, other components can be synchronized with the sync output. The component can be frequency-synchronized, but not phase-synchronized, with the sync input. The duty cycle of the squarewave voltage at the sync input is arbitrary. The best stability as to small phase and frequency interference deviation is achieved with a duty cycle as offered by the sync output. Push-Pull Flipflop The push-pull flipflop is switched by the falling edge of the VCO. This ensures that only one output of the two push-pull outputs is enabled at a time. Comparator K2 The two plus inputs of the comparator are switched such that the lower plus level is always compared with the level of the minus input. As soon as the voltage of the rising sawtooth edge exceeds the lower of the two plus levels, both outputs are disabled via the pulse turn-off flipflop. The period during which the respective, active outputs is low can be infinitely varied. As the frequency remains constant, this process corresponds to a change in duty cycle. Operational Amplifier K1 (TDA 4700; A) The K1 op amp is a high-quality amplifier. Fluctuations in the output voltage of the power supply are amplified by K1 and applied to the free + input of comparator K2. Variations in output voltage are, in this way, converted to a corresponding change in output duty cycle. K1 has a common-mode input voltage range between 0 V and + 5 V. Semiconductor Group 6 TDA 4700 TDA 4718 Pulse-Turn-OFF Flipflop The pulse turn-OFF flipflop enables the outputs at the start of each half cycle. If an error signal from comparator K7 or a turn-off signal from K2 is present, the outputs will immediately be switched off. Comparator K3 Comparator K3 limits the voltage at capacitance Csoft start (and also at K2) to a maximum of + 5 V. The voltage at the ramp generator output may, however rise to 5.5 V. With a corresponding slope of the rising ramp generator edge, the duty cycle can be limited to a desired maximum value. Comparator K4 The comparator has its switching threshold at 1.5 V and sets the error flipflop with its output if the voltage at capacitance Csoft start is below 1.5 V. However, the error flipflop accepts the set signal only if no reset pulse (error) is applied. In this way the outputs cannot be turned on again as long as an error signal is present. Soft Start The lower one of the two voltages at the plus inputs of K2 is a measure for the duty cycle at the output. At the instant of turning on the component, the voltage at capacitor Csoft start equals 0 V. As long as no error is present, this capacitor is charged with a current of 6 A to the maximum value of 5 V. In case of an error, Csoft start is discharged with a current of 2 A. A set signal is pending at the error flipflop below a charge of 1.5 V and the outputs are enabled if no reset signal is pending simultaneously. As the minimum ramp generator voltage, however, is 1.8 V, the duty cycle at the outputs is actually increased slowly and continuously not before the voltage at Csoft start exceeds 1.8 V. Error Flipflop Error signals, which are led to input R of the error flipflop cause an immediate disabling of the outputs, and after the error has been eliminated, cause the component to switch on again by the soft start. Comparator K5, K6, K8, VREF Overcurrent Load These are error detectors which cause immediate disabling of the outputs via the error flipflop when an error occurs. After elimination of the error, the component switches on again using the soft start. The output of K5 can be fed back to the input. This causes the IC output stage to remain disabled even after elimination of the overvoltage. However, it requires high-ohmic overvoltage coupling. Semiconductor Group 7 TDA 4700 TDA 4718 Comparator K7 K7 serves to recognize overcurrents. This is the reason why both inputs of the op amp have been brought out. Turning on is resumed after error recovery at the beginning of the next half period but without using the soft start. K7 has a common-mode range covers 0 V and + 4 V. The delay time between occurrence of an error and disabling of the outputs is only 250 ns. Symmetry (TDA 4700; A) In push-pull converters, a saturation of the transformer core must be prevented. The degree of saturation of the transformer can be determined with an external circuit, thus the active periods of the outputs can be decreased unsymmetrically at the symmetry inputs. Outputs Both outputs are transistors with open collectors and operate in a push-pull arrangement. They are active low. The time in which only one of the two outputs is conductive can be varied infinitely. The length of the falling edge at VCO is equal to the minimum time during which both outputs are disabled simultaneously. The minimum L voltage is 0.7 V. Reference Voltage The reference voltage source is a highly constant source with regard to its temperature behavior. It can be utilized in the external wiring of the op amp, the error comparators, the ramp generator, or other external components. Semiconductor Group 8 TDA 4700 TDA 4718 Block Diagram (TDA 4700) Semiconductor Group 9 TDA 4700 TDA 4718 Block Diagram (TDA 4718) Semiconductor Group 10 TDA 4700 TDA 4718 Absolute Maximum Ratings Parameter Symbol Limit Values min. Supply voltage Voltage at Q1, Q2 Current at Q1, Q2 Symmetry 1, 2 TDA 4700; A Sync output Sync input Input Cfilter Input RT Input CT Input RR Input CR Input comparator K2, K5, K6, K7 Output K5 Input op amp TDA 4700; A max. 33 33 70 - 0.3 - 0.3 0 - 0.3 - 0.3 - 0.3 - 0.3 - 0.3 - 10 - 0.3 - 0.3 - 0.3 - 0.3 - 0.3 - 0.3 - 55 33 7 10 33 7 7 7 7 10 33 33 33 V V mA V V mA V V V V V mA V V V V V V V C C K/W K/W K/W SYNC Q high SYNC Q low Unit Test Condition VS VQ IQ VSYM VSYNC Q ISYNC Q VSYNC I VI Cf VI RT VI CT VI RR II CR VI K VQ K5 VI Op Amp VQ Op Amp VREF VI soft start Tj Tstg Rth SA Rth SA Rth SA - 0.3 - 0.3 Q1, Q2 high Q1, Q2 low Output op amp TDA 4700; A Reference voltage Input Csoft start Junction temperature Storage temperature Thermal resistance system - air TDA 4700; A TDA 4718 TDA 4718 A VS - 1 max. 7 VREF 7 150 125 65 70 60 Semiconductor Group 11 TDA 4700 TDA 4718 Operating Range Parameter Symbol Limit Values min. Supply voltage Ambient temperature TDA 4700 TDA 4718 TDA 4700 A TDA 4718 A VCO frequency Ramp generator frequency max. 30 V Unit Test Condition VS 10.5 TA TA f fRG - 25 0 40 40 85 70 250 000 250 000 C C Hz Hz Characteristics VS = 11 to 30 V; TA = - 25 to 85 C Parameter Symbol min. Supply current Reference Reference voltage Reference voltage change Reference voltage change Reference voltage change Temperature coefficient Response threshold of IREF overcurrent 1) Limit Values typ. max. 20 Unit Test Condition IS 8 mA CT = 1 nF fVCO = 100 kHz VREF VREF VREF VREF 2.35 2.5 8 15 2.65 V mV mV 0 mA < IREF < 5 mA 14 V 20 % 25 V 20 % 0 mA < IREF < 5 mA 151) 0.25 0.4 10 mV mV/K mA TC IREF At TA = 0 to 70 C, this value falls to max. 5 mV Semiconductor Group 12 TDA 4700 TDA 4718 Characteristics (cont'd) VS = 11 to 30 V; TA = - 25 to 85 C Parameter Symbol min. Oscillator (VCO) Frequency range Frequency change Frequency change Tolerance Fall time sawtooth RC combination VCO Ramp Generator Frequency range Maximum voltage at CR Minimum voltage at CR Input current through RR Current transformation ratio Synchronization Sync output Sync input Input current Limit Values typ. max. Unit Test Condition fVCO 40 0.5 -1 -7 1 10 0.82 5 100 000 1 7 f/fVCO f/fVCO f/fVCO t t CT RT 47 700 Hz % % % s s nF k 14 V 20 % 25 V 20 % RT = 0; CT = 0 CT = 1 nF CT = 10 nF f VH VL IRR IRR/ICR 40 5.5 1.8 0 1/4 100 000 Hz V V 400 A VQ H VQ L VI H VI L - II 4 0.4 2 0.8 5 V V V V A IQ H = - 200 A IQ L = 1.6 mA Semiconductor Group 13 TDA 4700 TDA 4718 Characteristics (cont'd) VS = 11 to 30 V; TA = - 25 to 85 C Parameter Symbol min. Comparator K2 Input current Turn-OFF delay1) Input voltage - II K2 Limit Values typ. max. Unit Test Condition tD OFF VI K2 1.8 5 2 500 A ns V V for duty cycle D=0 D = max. Common-mode input voltage range Soft Start K3, K4 Charge current for VI C 0 5.5 V Csoft start Discharge current for Ich Idch Vlim VK4 6 2 5 1.5 A A V V Csoft start Upper limiting voltage Switching voltage K4 Operational Amplifier K1 (TDA 4700; TDA 4700 A) Open-loop voltage gain Input offset voltage Temperature coefficient of VIO Input current Common-mode input voltage range Output current Rise time of output voltage Transition frequency Phase at fT Output voltage 1) GV0 VIO TC - II VIC IQ V/t 60 - 10 - 30 80 10 30 2 5 1.5 1 3 120 dB mV V/K A V mA V/s MHz deg. V 0 -3 fT T VQ H/L 1.5 5.5 V = + 100 mV - 3 mA < I < 1.5 mA At the input: step function V = - 100 mV Semiconductor Group 14 TDA 4700 TDA 4718 Characteristics (cont'd) VS = 11 to 30 V; TA = - 25 to 85 C Parameter Symbol min. Symmetry (TDA 4700; TDA 4700 A) Input voltage Input current Output Stages Q1, Q2 Output voltage Output leakage current Limit Values typ. max. Unit Test Condition VI H VI L - II 2.0 0.8 2 V V A VQ H VQ L IQ 30 1.1 2 V V A IQ = 20 mA VQ H = 30 V ON, OFF, Undervoltage K6 Switching voltage Input current Turn-OFF delay time1) Error detection time1) V - II VREF - 0.03 250 50 VREF + 0.03 V 2 tD OFF t A ns ns Dynamic Current Limitation K7 Common-mode input voltage range Input offset voltage Input current Turn-OFF delay time2) Error detection time2) Overvoltage K5 Switching voltage Input current Output current Turn-OFF delay time1) Error detection time1) 1) 2) VIC VIO - II tD OFF t 0 - 10 250 50 4 10 2 V mV A ns ns V - II - IQ VREF - 0.03 0 250 50 VREF + 0.03 V 2 200 tD OFF t A A ns ns VQH min = 5 V At the input: step function V = VREF - 100 mV VREF + 100 mV At the input: step function V = - 100 mV V = + 100 mV Semiconductor Group 15 TDA 4700 TDA 4718 Characteristics (cont'd) VS = 11 to 30 V; TA = - 25 to 85 C Parameter Symbol min. Supply Undervoltage Turn-ON threshold for VS rising Turn-OFF threshold for VS falling Input Cfilter Rated voltage for rated frequency VR Frequency approx. proportional to voltage within the range VR Voltage at open sync input VC filter 4 V Limit Values typ. max. Unit Test Condition VS VS 8.8 8.5 11 10.5 10.5 10 V V V V 0 C < TA < 70 C 0 C < TA < 70 C 3 1.6 5 V V Semiconductor Group 16 TDA 4700 TDA 4718 Dimensioning Notes for RC Network 1. Determination of the minimum time during which both outputs must be disabled selection of CT; selection of CR CT. 2. Determination of the VCO frequency = 2 x output frequency selection of RT. 3. Determination of the rated slope of the rising ramp generator voltage, which the maximum possible turn-on period per half wave depends on selection of RR. 4. Duration of the soft start process selection of Csoft start. 5. In the case of a free-running VCO: connect sync output with sync input. 6. Wiring of the op amp according to the dynamic requirements and connection of its output with the free input of K2. (TDA 4700; TDA 4700 A) 7. Capacitance Cfilter is not required in the free-running operation (sync input connected with sync output). In the case of external synchronization, that value depends on the selected operating frequency and the required maximum phase interference deviation. Rated VCO frequency: Cfilter favourable: 100 kHz 10 nF 50 Hz 1F Semiconductor Group 17 TDA 4700 TDA 4718 Pulse Diagram Semiconductor Group 18 TDA 4700 TDA 4718 VCO Frequency versus RT and CT Semiconductor Group 19 TDA 4700 TDA 4718 VCO Temperature Response VS = 12 V; D = max. f VCO ---------------- [ 1 K ] with CT as parameter fK x K Semiconductor Group 20 TDA 4700 TDA 4718 Current Consumption versus Temperature Output Current versus Output Voltage Semiconductor Group 21 |
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